Siemens NAN 67 Series Instrukcja Obsługi Pobierz pdf (Strona 103)

8-5

Ladder Logic (LAD) for S7-300 and S7-400

C79000-G7076-C504-02

8.4 Output Coil

The Output Coil instruction works like a coil in a relay logic diagram. The

coil at the end of the circuit is either energized or not energized depending on

the following criteria:

S If power can flow across the circuit to reach the coil (that is, the signal

state of the circuit is 1), the power energizes the coil.

S If power cannot flow across the entire circuit to reach the coil (that is, the

signal state of the circuit is 0), the power cannot energize the coil.

The ladder logic string represents the circuit. The Output Coil instruction

assigns the signal state of the ladder logic string to the coil that the

instruction addresses (this is the same as assigning the signal state of the

RLO bit to the address). If there is power flow across the logic string, the

signal state of the logic string is 1; otherwise the signal state is 0.

The Output Coil instruction is affected by the Master Control Relay (MCR).

For more information on how the MCR functions, see Section 20.5.

You can place an Output Coil only at the right end of a logic string. Multiple

Output Coils are possible. You cannot place an output coil alone in an

otherwise empty network. The coil must have a preceding link.

You can create a negated output by using the Invert Power Flow instruction.

Table 8-3 Output Coil Element and Parameter

LAD Element Parameter Data Type Memory Area Description

<address> BOOL I, Q, M, D, L

The address indicates the bit to which

the signal state of the logic string is

assigned.

I 0.0

I 0.2

Status Word Bits

I 0.1

The signal state of output Q 4.0 is 1 if one of the

following conditions exists:

S The signal state is 1 at inputs I 0.0 and I 0.1

and I 0.3.

S Or the signal state is 0 at input I 0.2

The signal state of output Q4.1 is 1 if one of the

following conditions exists:

S The signal state is 1 at inputs I 0.0 and I 0.1

and I 0.3.

S Or the signal state is 0 at input I 0.2

and 1 at input I 0.3

BR CC 1 CC 0 OV OS OR STA RLO FC

Write – – – – – 0 x – 0

I 0.3

Q 4.0

Q 4.1

Figure 8-3 Output Coil

Description

Bit Logic Instructions

1 2 ... 98 99 100 101 102 103 104 105 106 107 108 ... 317 318

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