Siemens XT75 Dokumentacja Pobierz pdf (Strona 38)

XT65/XT75 Hardware Interface Overview

6.5 Pin Assignment and Signal Description

XT65_XT75_HO_v00.130 Page 38 of 67 2006-10-12

Confidential / Preliminary

SIM

interface

specified

for use

with 1.8V

SIM card

CCIN I R

≈ 100kΩ

max = 0.6V at I = -25µA

min = 2.1V at I = -10µA

max = 3.05V

CCIN = Low, SIM card holder

closed

Maximum cable length or copper

track 100mm to SIM card holder.

All signals of SIM interface are

protected against ESD with a spe-

cial diode array.

Usage of CCGND is mandatory.

CCRST O R

≈ 47Ω

max = 0.25V at I = +1mA

min = 1.45V at I = -0.5mA

max = 1.90V

CCIO I/O R

≈ 4.7kΩ

max = 0.45V

min = 1.35V

max = CCVCCmin + 0.3V =

2.00V

≈ 100Ω

max = 0.3V at I = +1mA

min = 1.45V at I = -0.5mA

max = 1.90V

CCCLK O R

≈ 100Ω

max = 0.3V at I = +1mA

min = 1.45V at I = -0.5mA

max = 1.90V

CCVCC O V

min = 1.70V,

typ = 1.80V

max = 1.90V

max = -20mA

CCGND Ground

C inter-

face

I2CCLK

_SPICLK

max = 0.2V at I = 2mA

min = 2.55V at I = -0.5mA

max = 3.05V

C interface is only available if the

two pins are not used as SPI inter-

face.

I2CDAT is configured as Open

Drain and needs a pull-up resistor

in the host application.

According to the I

C Bus Specifi-

cation Version 2.1 for the fast

mode a rise time of max. 300ns is

permitted. There is also a maxi-

mum VOL=0.4V at 3mA specified.

The value of the pull-up depends

on the capacitive load of the whole

system (I

C Slave + lines). The

maximum sink current of I2CDAT

and I2CCLK is 4mA.

If lines are unused keep pins open.

I2CDAT_SPIDO I/O V

max = 0.2V at I = 2mA

max = 0.8V

min = 2.15V

max = VEXTmin + 0.3V = 3.05V

Table 17: Signal description

Function Signal name IO Signal form and level Comment

1 2 ... 33 34 35 36 37 38 39 40 41 42 43 ... 57 58

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