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DPC31 HW

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DPC31 HW Description

Version V1.0 Page 47

Interrupt Enable Register:

Bit Position 7 6 5 4 3 2 1 0

----EN-

RECERR

EN-

PERR

EN-

RBFU

EN-

TBEM

Default 0 0 0 0

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ENTBEM: EnableTransmit Buffer Empty Interrupt

=0 Transmit Buffer Empty Interrupt is disabled.

=1 Transmit Buffer Empty Interrupt is enabled.

ENRBFU: Enable Receive Buffer Full Interrupt

=0 Receive Buffer Full Interrupt is disabled.

=1 Receive Buffer Full Interrupt is enabled.

ENPERR: Enable Parity Error Interrupt

=0 Parity Error Interrupt is disabled.

=1 Parity Error Interrupt is enabled.

ENRECERR: Enable Receive Error Interrupt

=0 Receive Error Interrupt is disabled.

=1 Receive Error Interrupt is enabled.

Baudrate Register:

An 8-bit division factor (G) is loaded in the baud register. This value specifies the baudrate according to the

following formula: (f

sys

= internal system clock). At 48 MHz, synchronous transmission of 12 MBaud

maximum is possible.

BR = f

sys

/ 4(G+1)

1 2 ... 44 45 46 47 48 49 50 51 52 53 54 ... 93 94

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